integrated circuit systems, inc. general description features ics9112-27 0055g?04/26/05 block diagram low skew pci / pci-x buffer pin configuration frequency range 0 - 140 mhz (3.3v) less than 200 ps jitter between outputs skew controlled outputs < 100 ps distribute one clock input to one bank of four outputs 3.3v 10% operation available in 8 pin tssop, and soic packages. the ics9112-27 is a high performance, low skew, low jitter pci / pci-x clock driver. it is designed to distribute high speed signals in pci / pci-x applications operating at speeds from 0 to 140 mhz. the ics9112-27 is characterized for operation from -40c to 85c for automotive and industrial applications. 8 pin tssop & soic clk_in oe clk0 gnd clk3 clk2 vdd clk1 ics9112-27 1 2 3 4 8 7 6 5 clk_in clk0 clk1 clk2 clk3 logic control oe pin descriptions stupn is tuptuo ni_kl ce o) 0:3(klc 00 e tatsirt 010 10 e tatsirt 111 functionality table rebmunni pe manni pe py tn oitpircsed 1n i_kl cn i. ycneuqerfecnerefertupni 2e on i stuptuokcolcehtsetatsirtti,wolsieonehw.elbanetuptuo 30 kl ct u ot uptuokcolcdereffub 4d n gr w pd nuorg 51 kl ct u ot uptuokcolcdereffub 6d d vr w pv 3.3rofylppusrewop 72 kl ct u ot uptu okcolcdereffub 83 kl ct u ot uptuokcolcdereffub
2 ics9112-27 0055g?04/26/05 absolute maximum ratings supply voltage range v dd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5v to 4.3 v input voltage rangev i (see notes 1 & 2) . . . . . . . . -0.5v to v dd + 0.5v output voltage range v o (see notes 1 & 2) . . . . . -0.5v to v dd + 0.5v input clamp current i ik (v i < 0 or v i >v dd ) . . . . . . . . . . . . . . . . 50 ma output clamp current i ok (v o < 0 or v o ) . . . . . . . . . . . . . . . . . 50 ma continuous total output current, i o (v o = 0 to v dd ) . . . . . . . . . 50 ma package thermal impedance ? ja (see note 3): pw package 230.5c/w storage temperature rante, t stg . . . . . . . . . . . . . . . . . . . . . . . -65c to 150c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. these ratings are stress specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect product reliability. notes: 1. the input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. this value is limited to 4.6 v maximum. 3. the package thermal impedance is calculated in accordance with jesd 51. snoitidnocgnitarepodednemmocer ni mm o nx a mt inu v,egatlovylppus dd 33 . 36 . 3v v,egatlovtupnilevel-hgih hi 7.0 x v dd v v,egatlovtupnilevel-wol li 3.0 x v dd v v,egatlovtupni i 0v dd v i,tnerructuptuolevel-hgih ho 42 -a m i,tnerructuptuolevel-wol lo 4 2a m t,erutarepmetria-eerfgnitarepo a 04 -5 8c dnaegatlovylppusfosegnardednemmocerrevostnemeriuqergnimit erutarepmetria-eerfgnitarepo ni mm o nx a mt inu fycneuqerfkcolc klc 00 4 1z hm
3 ics9112-27 0055g?04/26/05 electrical characteristics at 3.3v t a = -40 to 85c; supply voltage v dd = 3.3 v +/-10% (unless otherwise stated) parameter symbol conditions min typ max units input voltage v ik v dd = 3.3v, i i = -18 ma -1.2 v v dd = min to max, i oh = -1 ma v dd - 0.2 3.3 v dd = 3v, i oh = -24 ma 2 2.3 v dd = 3v, i oh = 12 ma 2.4 2.7 v dd = min to max, i oh = 1 ma 0.022 0.2 v dd = 3v, i oh = 24 ma 0.61 0.8 v dd = 3v, i oh = 12 ma 0.31 0.55 v dd = 3v, v o = 1v -53 -40 v dd = 3.3v, v o = 1.65v -54 v dd = 3v, v o = 2v 40 53 v dd = 3.3v, v o = 1.65v 57 input current i i v = v o or v dd -5 5 ma dynamic supply current i dd unloaded outputs at 66.67 mhz 13 37 ma input capacitance 1 c i v dd = 3.3v, v i = 0v or 3.3v 3 pf output capacitance 1 c o v dd = 3.3v, v i = 0v or 3.3v 3.2 pf 1. guaranteed by design, not 100% tested in production. low-level input current i ol high-level input current i oh high-level output voltage v oh low-level output voltage v ol v v ma ma switching characteristics at 3.3v t a = -40 to 0 85c; supply voltage v dd = 3.3 v +/-10% (for loading, see figures 1 and 2) parameter symbol conditions min typ max units high-to-low propagation delay 1 t plh v o = v dd /2 1.8 3.1 3.8 ns low-to-high propagation delay 1 t phl v o = v dd /2 1.8 2.9 3.8 ns output skew window 1 t sk (o) v o = v dd /2 50 100 ps pulse skew = | t plh - t phl | 1 t sk (p) v o = v dd /2 300 ps process skew 1 t sk (pr) v o = v dd /2 500 ps 66 mhz 6 140 mhz 3 66 mhz 6 140 mhz 3 output rise slew rate 1 t r 0.3 to 0.6 v d d 1.5 2.1 4 v/ns output rise slew rate 1 t f 0.6 to 0.3 v dd 1.5 2.4 4 v/ns 1. guaranteed by design, not 100% tested in production. clkin low time 1 t low ns ns clkin high time 1 t high
4 ics9112-27 0055g?04/26/05 v dd 0.6 v dd 0.6 v dd 50% v dd 50% v dd 50% v dd 50% v dd 0.2 v dd 0.2 v dd v oh v ol clk0-clk3 any clk any clk 50% v dd 0v t plh t r t f t sk(0) t phl clkin clk n v dd 140 10 pf 140 figure 1. test load circuit figure 2. voltage thresholds for propagation delay (t ) measurements pd parameter measurement information figure 3. output skew figure 4. clock waveform t cyc t high v ih(min) v test v il(max) t low 0.6 v dd 0.2 v dd 0.4 v dd peak to peak (minimum) paramameter value unit v ih(min) 0.5 v dd v v il(max) 0.35 v dd v v test 0.4 v dd v note: all parameters in figure 4 are according to pci-x 1.0 specifications.
5 ics9112-27 0055g?04/26/05 ics9112ag-27 supply current vs. frequency v dd = 3.63 v, t a = 85 o c 0 5 10 15 20 25 30 35 0 20 40 60 80 100 120 140 160 frequency (mhz) idd (ma) ics9112ag-27 high-level output voltage vs high-level output current v dd = 3.3v, t a = 25 o c 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 -80 -70 -60 -50 -40 -30 -20 -10 0 ioh - high-level output current (ma) voh - high-level output current (ma)
6 ics9112-27 0055g?04/26/05 ics9112ag-27 low-level output voltage vs low-level output current v dd = 3.3v, t a = 25 o c 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 10203040506070 iol - low-level output current (ma) vol - low-level output current (ma)
7 ics9112-27 0055g?04/26/05 ordering information 9112 yg-27lf-t 4.40 mm. body, 0.65 mm. pitch tssop (173 mil) (0.0256 inch) min max min max a--1.20 -- .047 a1 0.05 0.15 .002 .006 a2 0.80 1.05 .032 .041 b 0.19 0.30 .007 .012 c 0.09 0.20 .0035 .008 d e e1 4.30 4.50 .169 .177 e l 0.45 0.75 .018 .030 n 0 8 0 8 aaa -- 0.10 -- .004 v ariations m in m ax min max 8 2.90 3.10 .114 .122 10-0035 n d mm. d ( inch ) reference doc.: jedec publication 95, mo-153 0.65 basic 0.0256 basic see variations see variations see variations see variations 6.40 basic 0.252 basic 4.40 mm. body, 0.65 mm. pitch tssop (173 mil) (25.6 mil) symbol in millimeters in inches common dimensi ons common dimensions example: designation for tape and reel packaging annealed lead free (optional) package type g = tssop revision designator (will not correlate with datasheet revision) device type p xxxx y g lf- t index area 12 n d e1 e seating plane a1 a a2 e -c- b c l aaa c
8 ics9112-27 0055g?04/26/05 ordering information 9112 y m-27lf-t 150 mil (narrow body) soic mi n max mi n max a 1.35 1.75 .0532 .0688 a1 0.10 0.25 .0040 .0098 b 0.33 0.51 .013 .020 c 0.19 0.25 .0075 .0098 d e 3.80 4.00 .1497 .1574 e h 5.80 6.20 .2284 .2440 h 0.25 0.50 .010 .020 l 0.40 1.27 .016 .050 n 0 8 0 8 variations mi n max mi n max 8 4.80 5.00 .1890 .1968 10 - 0 0 3 0 ref erence doc.: jedec publication 95 , ms-012 150 mil ( narrow bod y) soic see var iations see variations n d mm. d (inch) see variations see variations 1.27 basic 0.050 basic symbol i n millimeters i n inches common dimensions common dimensions example: designation for tape and reel packaging annealed lead free (optional) package type m = soic revision designator (will not correlate with datasheet revision) device type p xxxx y m lf- t seating plane a1 b a e .10 (.004) h x 45 l c index are a 12 n d e h
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